In semiconductor technology, a relatively high level of stress on epitaxially formed source/drain regions can improve the performance of a semiconductor device. In a fin field effect transistor (FinFET) manufacturing process, the integrity protection of epitaxially formed regions is very important and advantageous to improve the device performance by maintaining a high level of stress on the epitaxial regions. However, in the epitaxial process, the recess formed on the fin may have an irregular form, resulting in an incomplete epitaxial morphology, thereby decreasing the device performance.
At present, a dummy gate structure may be formed on opposite sides of a shallow trench isolation (STI) of the semiconductor fin to protect the distal ends of the fin to facilitate the epitaxial growth of the source and drain in subsequent processes.